---
title: "Ajay Kuruba - Lead Design Engineer in Anantapur | Tal"
description: "Meet Ajay Kuruba, RTL Design Engineer l llT Bombay ’21 | NIT Trichy ’17 | based in Anantapur. AI stack includes antigravity, codex, and cursor."
image: "https://tal.club/meet/ajay-kuruba/share-image"
---

# Ajay Kuruba on Tal

## Headline

RTL Design Engineer l llT Bombay ’21 \| NIT Trichy ’17 \|

## Location

Anantapur

## AI stack

antigravity

codex

cursor

## Work experience

Lead Design Engineer at Cadence Design Systems, Jul 2024 \- Present · 2 yrs 2 mos, Bengaluru, RTL Design Engineer with expertise in LPDDR5X/LPDDR6 PHY and Testchips design, RTL development, low\-power architecture, and design signoff\. Experienced in microarchitecture, CDC/RDC, STA, UPF, and silicon bring\-up, with a strong background in high\-speed semiconductor systems

Design Engineer 2 at Cadence Design Systems, Jan 2023 \- Jul 2024 · 1 yr 7 mos, Hybrid

Design Verification Engineer at Micron Technology, Jul 2021 \- Jan 2023 · 1 yr 7 mos, Hyderabad, Telangana, India

Intern at Texas Instruments, Jun 2020 \- Jun 2021 · 1 yr 1 mo, India

Operations Officer at Indian Oil Corp Limited, Nov 2018 \- Jun 2019 · 8 mos, India

## Education

Master's degree, Integrated Circuit Design, Indian Institute of Technology, Bombay

Bachelor's degree, Electronics and Communication, National Institute of Technology, Tiruchirappalli

[View the original profile](https://tal.club/meet/ajay-kuruba)

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