Headline

R&D Engineer | EV Battery Pack Development 🔋|Solar |ASIC Verification Engineer | Verilog | RTL Design | Simulation

About

I’m a passionate enthusiastic Verification Engineer with a strong interest in VLSI design, functional verification, and semiconductor technology. I’ve developed practical skills in SystemVerilog, UVM, RTL verification, and AMBA protocol testing (AXI, AHB, APB) through hands-on projects and advanced training at Maven Silicon. My background combines a solid understanding of digital design, testbench development, and debugging using tools like ModelSim, Verdi, and Synopsys VCS. I enjoy solving complex design challenges, automating verification tasks with Python, Perl, and TCL, and working collaboratively to ensure design quality and reliability. I’m eager to grow in the semiconductor industry and contribute to SoC and IP-level verification projects that push the boundaries of performance and innovation.

Location

India

Work experience

Research And Development Engineer at EPITOME SUSTAINABLE ENERGY PVT LTD, Sep 2024 - Present · 1 yr 9 mos, Pune District, Maharashtra, India

Graduate engineer Apprentice at VRDE DRDO, Jan 2023 - May 2024 · 1 yr 5 mos, Ahmednagar, Maharashtra, India, site

Education

Bachelor's degree, Electronic and telecommunication, Padamshri. Dr.Vitthalrao Vikhe Patil Foundations Padamshri. Dr.Vitthalrao Vikhe Patil College of Engineering, Vilad Ghat, Ahmednagar 414111

Public links

github: https://github.com/Shekhar-himanshu08