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Ahalya S Kumar

ECE Post-graduate 2024 | VLSI Enthusiast |Trained Design and Verification Engineer | Passionate about Front-End Innovation

Bengaluru

4+ years of work experience

Maven Silicon
Jan 20251 yr 10 mosPresent

Remote

- Designed Router 1X3 using Verilog and verified the TB using UVM methodology. - Designed 4-bit synchronous Loadable Up-down counter using Verilog and verified the same using SV. - Designed an Alarm clock using Verilog and verified using SVA.
Nov 20237 mosMay 2024

Bengaluru, Karnataka, India

FPGA Based Transceiver for OFDM MIMO Radar - A novel FPGA based OFDM MIMO design for transceiver for multifunctional radar operation is presented. - Design enables simultaneous scheduling of beams across OFDM sub-carriers for concurrent multi-mode MIMO operations. - Designed the structure using VIVADO, programmed the design in an FPGA and analyzed the outputs through MATLAB. Receive Beamforming and Angle Estimation in 5G Receivers - A beamformer along with an Angle of Arrival estimator is designed. - Beamformer enables the penetration in millimeter waves. - Designed the structure in VIVADO, programmed in FPGA and analyzed the outputs in MATLAB.
Tata Consultancy Services
Oct 20202 yrsSep 2022

Bengaluru, Karnataka, India

Providing information to the customers about products and services, maintaining records of transactions and interactions using LINUX commands, timely follow-ups wherever required, and escalating unresolved queries to respective departments for accurate redressal.

Ahalya’s AI Stack

claude code
claude code

Education

APJ Abdul Kalam Technological University

Master of Technology - MTech, Communication Engineering and Signal Processing

APJ Abdul Kalam Technological University

20222 yrs2024
APJ Abdul Kalam Technological University

Bachelor of Technology - BTech, Electronics and Communication Engineering

APJ Abdul Kalam Technological University

20164 yrs2020

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Ahalya S Kumar on Tal

Headline

ECE Post-graduate 2024 | VLSI Enthusiast |Trained Design and Verification Engineer | Passionate about Front-End Innovation

About

As an enthusiastic Electronics and Communication Engineer with hands on experience in RTL design and verification, I aim to start my career as a design and verification engineer where I can apply my knowledge on digital design, Verilog and SV. I am eager to contribute to cutting-edge verification environments with industry-standard methodologies like UVM, while continuously learning and growing in a challenging, innovation-driven organization. I love to spend my free time by listening music and dancing.

Location

Bengaluru

AI stack

claude code

Work experience

Trainee at Maven Silicon, Jan 2025 - Present · 1 yr 10 mos, Remote, - Designed Router 1X3 using Verilog and verified the TB using UVM methodology. - Designed 4-bit synchronous Loadable Up-down counter using Verilog and verified the same using SV. - Designed an Alarm clock using Verilog and verified using SVA.

Research Intern at Centre For Air Borne Systems (Cabs), A Unit Of Defence Research And Development Organization (Drdo), Nov 2023 - May 2024 · 7 mos, Bengaluru, Karnataka, India, FPGA Based Transceiver for OFDM MIMO Radar - A novel FPGA based OFDM MIMO design for transceiver for multifunctional radar operation is presented. - Design enables simultaneous scheduling of beams across OFDM sub-carriers for concurrent multi-mode MIMO operations. - Designed the structure using VIVADO, programmed the design in an FPGA and analyzed the outputs through MATLAB. Receive Beamforming and Angle Estimation in 5G Receivers - A beamformer along with an Angle of Arrival estimator is designed. - Beamformer enables the penetration in millimeter waves. - Designed the structure in VIVADO, programmed in FPGA and analyzed the outputs in MATLAB.

Assistant System Engineer at Tata Consultancy Services, Oct 2020 - Sep 2022 · 2 yrs, Bengaluru, Karnataka, India, Providing information to the customers about products and services, maintaining records of transactions and interactions using LINUX commands, timely follow-ups wherever required, and escalating unresolved queries to respective departments for accurate redressal.

Education

Master of Technology - MTech, Communication Engineering and Signal Processing, APJ Abdul Kalam Technological University

Bachelor of Technology - BTech, Electronics and Communication Engineering, APJ Abdul Kalam Technological University

Public links

github: https://github.com/ASK1209

Ahalya S Kumar - Trainee in Bengaluru | Tal